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Freescale Semiconductor /MK61F15WS /DDR /CR01

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Interpret as CR01

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MAXROW0RESERVED 0 (0000)MAXCOL0RESERVED 0 (00)CSMAX 0RESERVED

CSMAX=00, MAXCOL=0000

Description

DDR Control Register 1

Fields

MAXROW

Maxmum Row
RESERVED

Reserved
MAXCOL

Maximum Column

0 (0000): 0

1 (0001): 1

11 (1011): 11

12 (1100): Reserved

13 (1101): Reserved

14 (1110): Reserved

15 (1111): Reserved
RESERVED

Reserved
CSMAX

Chip Select Maximum

0 (00): Zero

1 (01): One

2 (10): Two

3 (11): Reserved
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data